|
Volumn , Issue , 2010, Pages
|
Embedded Wafer Level Ball grid array (eWLB) technology for system integration
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ADVANCED CMOS;
EXCELLENT PERFORMANCE;
FAN-OUT;
HEAT DISSIPATION;
INTERCONNECT DENSITIES;
INTERCONNECT DESIGN;
MM-WAVE APPLICATION;
NEW MATERIAL;
PACKAGING TECHNOLOGIES;
SYSTEM IN PACKAGE;
SYSTEM INTEGRATION;
SYSTEM-ON-CHIP INTEGRATION;
WAFER LEVEL;
WAFER-LEVEL PACKAGING TECHNOLOGY;
WARPAGES;
CMOS INTEGRATED CIRCUITS;
MATERIALS PROPERTIES;
MICROPROCESSOR CHIPS;
PACKAGING;
PROGRAMMABLE LOGIC CONTROLLERS;
SILICON WAFERS;
TECHNOLOGY;
ELECTRONICS PACKAGING;
|
EID: 79251550165
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/CPMTSYMPJ.2010.5679657 Document Type: Conference Paper |
Times cited : (40)
|
References (7)
|