Logic circuit design by neural network and PSO algorithm

Proceedings - 2010 1st International Conference on Pervasive Computing, Signal Processing and Applications, PCSPA 2010

Volumn , Issue , 2010, Pages 456-459

  Yang, Jen Pin ^a   Kung, Chih Kung ^a   Liu, Fang Tsung ^b   Chen, Yu Ju ^c   Chang, Chuo Yean ^c   Hwang, Rey Chue ^a  

^a I SHOU UNIVERSITY   (Taiwan)

^b NATIONAL KAOHSIUNG UNIVERSITY OF APPLIED SCIENCES   (Taiwan)

^c CHENG SHIU UNIVERSITY   (Taiwan)

Author keywords

Logic circuit design; Neural network; Particle swarm optimization

Indexed keywords

EVOLUTIONARY HARDWARE; LOGIC CIRCUIT DESIGN; LOGIC UNIT; PARTICLE SWARM; PSO ALGORITHMS; SIMULATION RESULT;

ALGORITHMS; INTEGRATED CIRCUIT MANUFACTURE; LOGIC DESIGN; NEURAL NETWORKS; PARTICLE SWARM OPTIMIZATION (PSO); SIGNAL PROCESSING; SWITCHING CIRCUITS; UBIQUITOUS COMPUTING;

LOGIC CIRCUITS;

EID: 78650429652     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PCSPA.2010.116     Document Type: Conference Paper

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