A stacking scheme to improve the efficiency of finite-difference time-domain solutions on graphics processing units

Applied Computational Electromagnetics Society Journal

Volumn 25, Issue 4, 2010, Pages 323-330

  Demir, Veysel ^a  

^a NORTHERN ILLINOIS UNIVERSITY   (United States)

Author keywords

Compute unified device architecture (CUDA); FDTD methods; Graphics processing unit (GPU) programming; Hardware accelerated computing; Parallel architectures

Indexed keywords

CENTRAL PROCESSOR UNITS; COMPUTE UNIFIED DEVICE ARCHITECTURES; ELECTROMAGNETICS; FDTD METHOD; FINITE-DIFFERENCE TIME-DOMAIN SOLUTION; GRAPHIC PROCESSING UNITS; GRAPHICS PROCESSING UNIT; HARDWARE ACCELERATED COMPUTING; HARDWARE TECHNOLOGY; HIGHER EFFICIENCY; MULTI CORE; OPTIMIZATION PROBLEMS; ORDERS OF MAGNITUDE; PARALLEL PROCESSING ARCHITECTURES; PROBLEM SIZE; PROGRAMMING SOFTWARE; SCIENTIFIC COMPUTING; STACKING SCHEME; WIDE SPREADS;

COMPUTER GRAPHICS EQUIPMENT; COMPUTER HARDWARE; ELECTROMAGNETISM; FINITE DIFFERENCE TIME DOMAIN METHOD; IMAGE CODING; NUMERICAL ANALYSIS; NUMERICAL METHODS; PARALLEL ARCHITECTURES; PARALLEL PROGRAMMING; PROGRAM PROCESSORS;

PROBLEM SOLVING;

EID: 77958192667     PISSN: 10544887     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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