Fast sequential FPGA startup based on partial and dynamic reconfiguration

Proceedings - IEEE Annual Symposium on VLSI, ISVLSI 2010

Volumn , Issue , 2010, Pages 190-194

  Hübner, Michael ^a   Meyer, Joachim ^a   Sander, Oliver ^a   Braun, Lars ^a   Becker, Jürgen ^a   Noguera, Juanjo ^b   Stewart, Rodney ^b  

^a KARLSRUHE INSTITUTE OF TECHNOLOGY   (Germany)

^b XILINX INC   (United States)

Author keywords

Dynamic and partial reconfiguration; Fast wakeup; Sram based fpga

Indexed keywords

APPLICATION DOMAINS; APPLICATION RANGE; DYNAMIC AND PARTIAL RECONFIGURATION; DYNAMIC RE-CONFIGURATION; ELECTRONIC SYSTEMS; FAST WAKEUP; HIGH FLEXIBILITY; LOGIC RESOURCES; POWER BUDGETS; POWER CONSUMPTION; POWER SAVING MODES; POWER SUPPLY; SLEEP MODE; SRAM-BASED FPGA; VOLATILE MEMORY;

DRAIN CURRENT; DYNAMIC MODELS; SLEEP RESEARCH;

STATIC RANDOM ACCESS STORAGE;

EID: 77957906578     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2010.19     Document Type: Conference Paper

References (8)

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