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Volumn , Issue , 2004, Pages 28-32
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Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration
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Author keywords
Dynamic partial reconfiguration; Virtex
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Indexed keywords
COMPUTER NETWORKS;
CONSTRAINT THEORY;
DATA COMMUNICATION SYSTEMS;
INPUT OUTPUT PROGRAMS;
INTERFACES (COMPUTER);
REAL TIME SYSTEMS;
TOPOLOGY;
DYNAMIC PARTIAL RECONFIGURATION;
MODULAR DESIGN;
SELF-RECONFIGURATION;
VIRTEX;
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 14244258231
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/sbcci.2004.240972 Document Type: Conference Paper |
Times cited : (64)
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References (12)
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