Impact of Ge nitride interfacial layers on performance of Metal Gate/High-k Ge-nMISFETs

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2010, Pages 213-214

  Maeda, Tatsuro ^a   Morita, Yukinori ^a   Takagi, Shinichi ^a,b  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

^b UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TRAPPING; FIXED CHARGES; FORMATION PROCESS; GATE STACKS; GE(100); HIGH ELECTRON MOBILITY; HIGH-K GATE STACKS; INTERFACIAL LAYER;

ELECTRON MOBILITY; HAFNIUM COMPOUNDS; LOGIC GATES; NITRIDES;

GERMANIUM;

EID: 77957870388     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2010.5556232     Document Type: Conference Paper

References (6)

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4. T. Maeda et al., Appl. Phys. Lett., (2007) 90 072911.
5. D. Kuzum et al., IEDM Tech Dig., (2009) 453.
6. S. J. Wang et al., Appl. Phys. Lett., (2006) 89 022105.