Mobility enhancement over universal mobility in (100) silicon nanowire gate-all-around MOSFETs with width and height of less than 10nm range

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2010, Pages 175-176

  Chen, Jiezhi ^a   Saraya, Takuya ^a   Hiramoto, Toshiro ^a  

^a INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

GATE-ALL-AROUND; MOBILITY DEGRADATION; MOBILITY ENHANCEMENT; MOSFETS; PHYSICAL MECHANISM; SI NANOWIRE; SILICON NANOWIRES; STRAIN ENGINEERING; SYSTEMATIC STUDY;

ELECTRON MOBILITY; NANOWIRES; SEMICONDUCTING SILICON COMPOUNDS;

HOLE MOBILITY;

EID: 77957865267     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2010.5556217     Document Type: Conference Paper

References (14)

1. T. Tezuka et al., IEDM'07, p.887.
2. J. Chen et al., VLSI'08, p.93.
3. P. Hashemi et al., IEDM'08, p.865.
4. J. Chen et al., IEDM'08, p.757.
5. J. Chen et al., VLSI'09, p.90.
6. R. Kotlyar et al., APL 84, p.5270, 2004.
7. K. Tachi et al., IEDM'09, p.313.
8. L. Sekaric et al., APL 95, 023113, 2009.
9. H. Irie et al., IEDM'04, p. 225.
10. S. Takagi et al., EDL 41, p.2357, 1994.
11. K. Uchida et al., IEDM'08, p.569.
12. Y. Jeong et al., IEDM'08, p. 761.
13. Y. Jeong et al., SNW'08, M0930.
14. K. Uchida et al., IEDM'06, p.1019.