Assessment of room-temperature phonon-limited mobility in gated silicon nanowires

Applied Physics Letters

Volumn 84, Issue 25, 2004, Pages 5270-5272

  Kotlyar, R ^a   Obradovic, B ^a   Matagne, P ^a   Stettler, M ^a   Giles, M D ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONDUCTION BANDS; DENSITY OF STATES (DOS); NANOWIRES; PHONON SCATTERING; SI GATED WIRES;

ANISOTROPY; APPROXIMATION THEORY; COMPUTER SIMULATION; CRYSTALLOGRAPHY; DEGRADATION; ELECTRON ENERGY LEVELS; ELECTRON MOBILITY; ELECTRON SCATTERING; FERMI LEVEL; INTEGRATION; MOSFET DEVICES; PARAMETER ESTIMATION; PHONONS; POISSON EQUATION; RELAXATION PROCESSES; SILICON;

NANOSTRUCTURED MATERIALS;

EID: 3142715886     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1762695     Document Type: Article

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