High parallel disparity map computing on FPGA

Proceedings of 2010 IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications, MESA 2010

Volumn , Issue , 2010, Pages 307-312

  Calderón, Humberto ^a   Ortiz, Jesús ^a   Fontaine, Jean Guy ^a  

^a ISTITUTO ITALIANO DI TECNOLOGIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ADDRESS GENERATION; DATA-PATH UNITS; DISPARITY MAP; FPGA DEVICES; FRAME RATE; FRAMES PER SECONDS; HARDWARE ACCELERATORS; INTERMEDIATE FORMATS; MEMORY ORGANIZATIONS; PARALLEL HARDWARE; POWER CONSUMPTION; PROCESSING ALGORITHMS; SUM OF ABSOLUTE DIFFERENCES;

MECHATRONICS;

EMBEDDED SYSTEMS;

EID: 77957337436     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MESA.2010.5552049     Document Type: Conference Paper

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