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Volumn , Issue , 2010, Pages 254-257
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Robust design methods for hardware accelerators for iterative algorithms in scientific computing
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Author keywords
Bit width allocation; Satisfiability modulo theory
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Indexed keywords
BIT-WIDTH;
DATA FLOW;
HARDWARE ACCELERATION;
HARDWARE ACCELERATORS;
ITERATIVE ALGORITHM;
KEY PARTS;
NUMERICAL DATA;
POINT DATA;
ROBUST DESIGN METHODS;
SATISFIABILITY;
SCIENTIFIC COMPUTING;
SCIENTIFIC COMPUTING APPLICATIONS;
ALGORITHMS;
COMPUTER AIDED DESIGN;
EMBEDDED SOFTWARE;
PRODUCT DESIGN;
UBIQUITOUS COMPUTING;
EMBEDDED SYSTEMS;
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EID: 77956204830
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/1837274.1837339 Document Type: Conference Paper |
Times cited : (4)
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References (12)
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