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Volumn , Issue , 2010, Pages 1496-1499

A multiple code-rate turbo decoder based on reciprocal dual trellis architecture

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL EFFICIENCY; HARDWARE COMPLEXITY; HIGH RADIX; MULTIPLE CODES; SIMULATION RESULT; STORAGE UNITS; TRELLIS COMPLEXITY; TURBO DECODERS; W-CDMA SYSTEM;

EID: 77955985782     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2010.5537361     Document Type: Conference Paper
Times cited : (4)

References (7)
  • 2
    • 0016037512 scopus 로고
    • Optimal decoding of linear codes for minimizing symbol
    • Mar.
    • L. R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, "Optimal decoding of linear codes for minimizing symbol," IEEE Trans. Inform. Theory, vol. IT-20, pp. 284-287, Mar. 1974.
    • (1974) IEEE Trans. Inform. Theory , vol.IT-20 , pp. 284-287
    • Bahl, L.R.1    Cocke, J.2    Jelinek, F.3    Raviv, J.4
  • 3
    • 0028714252 scopus 로고
    • New rate-compatible punctured convolutional codes for viterbi decoding
    • DEC.
    • L. H. C. Lee, "New rate-compatible punctured convolutional codes for viterbi decoding," IEEE Trans. Commun., vol. 42, no. 12, pp. 3073-3079, DEC. 1994.
    • (1994) IEEE Trans. Commun. , vol.42 , Issue.12 , pp. 3073-3079
    • Lee, L.H.C.1
  • 4
    • 0032075309 scopus 로고    scopus 로고
    • Map decoding of convolutional codes using reciprocal dual codes
    • MAY
    • S. Riedel, "Map decoding of convolutional codes using reciprocal dual codes," IEEE Trans. Inform. Theory, vol. 44, no. 3, pp. 1176-1187, MAY. 1998.
    • (1998) IEEE Trans. Inform. Theory , vol.44 , Issue.3 , pp. 1176-1187
    • Riedel, S.1
  • 5
    • 33947169381 scopus 로고    scopus 로고
    • Log domain implementation of the dual-app algorithm
    • Feb.
    • S. S and S. S. Pietrobon, "Log domain implementation of the dual-app algorithm," Australian Commun. Theory Workshop, pp. 100-104, Feb. 2005.
    • (2005) Australian Commun. Theory Workshop , pp. 100-104
    • Pietrobon, S.S.1
  • 6
    • 0025600781 scopus 로고
    • VLSI architertures for metric normalization in the Viterbi algorithm
    • Atlanta, CA, Apr.
    • C. Shung, P. Siegel, G. Ungerboeck, and H. Thapar, "VLSI architertures for metric normalization in the Viterbi algorithm," in Int. Conf. Communications, vol. 4, Atlanta, CA, Apr. 1990, pp. 1723-1728.
    • (1990) Int. Conf. Communications , vol.4 , pp. 1723-1728
    • Shung, C.1    Siegel, P.2    Ungerboeck, G.3    Thapar, H.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.