FPGA and GPU implementation of large scale SpMV

Proceedings of the 2010 IEEE 8th Symposium on Application Specific Processors, SASP'10

Volumn , Issue , 2010, Pages 64-70

  Shan, Yi ^a   Wu, Tianji ^a   Wang, Yu ^a   Wang, Bo ^a   Wang, Zilong ^a   Xu, Ningyi ^b   Yang, Huazhong ^a  

^a TSINGHUA UNIVERSITY   (China)

^b MICROSOFT RESEARCH ASIA   (China)

Author keywords

AMD GPU; Component; FPGA; Memory hierachy; SpMV

Indexed keywords

AMD GPU; COMPONENT; FPGA; MEMORY HIERACHY; SPMV;

SMART CARDS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 77955747336     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SASP.2010.5521144     Document Type: Conference Paper

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