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Volumn 87, Issue 11, 2010, Pages 2382-2390

Utilizing inkjet printing to fabricate electrical interconnections in a system-in-package

Author keywords

Inkjet; Printed electronics; Process optimization; System in package

Indexed keywords

AFFECTING FACTORS; DESIGNED EXPERIMENTS; ELECTRICAL INTERCONNECTIONS; ELECTRONIC PACKAGE; ERROR SOURCES; INKJET-PRINTED ELECTRONICS; MANUFACTURING STAGES; NANO-PARTICLE METAL; OPTIMIZED PROCESS; POLYMER DIELECTRICS; PRINTING PROCESS; PROCESS OPTIMIZATION; PROCESS PERFORMANCE; PROCESS YIELD; SIGNIFICANT FACTORS; SYSTEM IN PACKAGE;

EID: 77955513367     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2010.04.013     Document Type: Article
Times cited : (40)

References (26)
  • 1
    • 77955514098 scopus 로고    scopus 로고
    • J. Miettinen, V. Pekkanen, K. Kaija, P. Mansikkamäki, J. Mäntysalo, M. Mäntysalo, et al., Microelectronics Journal 39 (2008).
    • (2008) Microelectronics Journal , vol.39
    • Miettinen, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.