SNAP: A sensor-network asynchronous processor

Proceedings - International Symposium on Asynchronous Circuits and Systems

Volumn , Issue , 2003, Pages 24-33

  Kelly IV, Clinton ^a   Ekanayake, Virantha ^a   Manohar, Rajit ^a  

^a Cornell University ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; SENSOR NODES;

CHIP MULTIPROCESSOR; NETWORK ON A CHIP; PROCESSOR CORES; SENSOR NETWORK ASYNCHRONOUS PROCESSORS; SENSOR NETWORK NODES; SENSOR NETWORK SIMULATOR; SENSORS NETWORK;

NETWORK-ON-CHIP;

EID: 77954509638     PISSN: 26431394     EISSN: 26431483     Source Type: Conference Proceeding    
DOI: 10.1109/ASYNC.2003.1199163     Document Type: Conference Paper

References (36)

1. G. Bianchi. Performance Analysis of the IEEE 802.11 Distributed Coordination Function. IEEE Journal on Selected Areas in Communications, 18(3), March 2000.
2. W. Dally et al. The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms. IEEE Micro, pages 23-39, April 1992.
3. F. Desbrandes, S. Bertolotti, and L. Dunand. Opnet 2.4: an environment for communication network modeling and simulation. Proceedings of the European Simulation Symposium, pages 609-614, Delft, Netherlands, October 1993.
4. S. Desilva and S. Das. Evaluation of a Wireless Ad Hoc Network, Proceedings of the 9th Int. Conf., on Computer Communications and Networks (IC3N), Las Vegas, October 2000.
5. V. Ekanayake. Asynchronous Dynamic Random Access Memories. Master's Thesis, Cornell University, Ithaca, NY, 2002.
6. R. Fujimoto. Parallel discrete event simulation. Communications of the ACM, 33(10): 30-53, October 1990.
7. J. Garside et al. AMULET3i - an Asynchronous System-on-Chip Proceedings Async 2000 pages 162-175 IEEE Computer Society Press April 2000.
8. IEEE. Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications. IEEE Standard 802.11, June 1999.
9. G. Kane, J. Heinrich. Mips Rise Architecture. Prentice Hall. 1991.
10. C. Kelly. Wireless Network Simulation Done Faster Than Real Time. Master's Thesis, Cornell University, Ithaca, NY, 2002.
11. A. Lines. Pipelined Asynchronous Circuits. MS Thesis, California Institute of Technology, 1996.
12. J. Liu et al. Simulation modeling of large-scale ad-hoc sensor networks. European Simulation Interoperability Workshop, 2001.
13. C. Lutz et al. Design of the Mosaic Element. http://resolver.library. caltech.edu/caltechCSTR:1983.5093-tr-83
14. A. Mainwaring et al. Wireless Sensor Networks for Habitat Monitoring. ACM International Workshop on Wireless Sensor Networks and Applications, September 28, 2002.
15. D. Maltz, J. Broch, and D. Johnson. Experiences designing and building a multi-hop wireless ad hoc network testbed. Technical Report CMU-CS-99-116, School of Computer Science, Carnegie Mellon University, Pittsburgh, Pennsylvania, March 1999.
16. R. Manohar and C. Kelly. Network on a Chip: Modeling Wireless Networks with Asynchronous VLSI. IEEE Communications Magazine, November 2001.
17. R. Manohar and A. Martin. Quasi-delay-insensitive circuits are Turing-complete. Invited article, Second International Symposium on Advanced Research in Asynchronous Circuits and Systems. March 1996. Available as Caltech technical report CS-TR-95-11, November 1995.
18. R. Manohar and A. Martin. Pipelined Mutual Exclusion and the Design of an Asynchronous Microprocessor. Cornell Computer Systems Lab Technical Report CSL-TR-2001-1017, November 2001. http://www.csl.Cornell.edu/scripts/listtr
19. A. Martin. Synthesis of Asynchronous VLSI Circuits. Caltech Technical Report CS-TR-93-28. 1991.
20. A. Martin et al. The Design of an Asynchronous Microprocessor. Decennial Caltech Conference on VLSI, ed CL. Seitz, MIT Press, 1989.
21. A. Martin et al. The Design of an Asynchronous MIPS R3000. Proceedings of the 17th Conference on Advanced Research in VLSI, pages 164-181, September 1997.
22. S. McCanne and S. Floyd. The ns network simulator. Available on the web from the following site: http://www.isi.edu/nsnam/ns/.
23. G. Mergen and L. Tong. Receiver Controlled Medium Access in Multihop Ad Hoc Networks with Multipacket Reception. Proceedings of 2001 MILCOM, Washington, DC, Oct. 2001.
24. N. Paver et al. Register Locking in an Asynchronous Microprocessor. Proc. ICCD '92, 351-355, October 1992.
25. J. Poulton. An embedded DRAM for CMOS ASICs. Proceedings. Seventeenth Conference on Advanced Research in VLSI. pp. 288-302, 1997.
26. Radio Frequency Monolithics (RFM) TR1000 916.50Mhz transceiver chip Datasheet. Available:www.rfm.com/products/data/tr100.pdf
27. V. Raghunathan et al. Energy aware wireless microsensor networks, IEEE Signal Processing Magazine, vol. 19, iss. 2, pp. 40-50, March 2002.
28. M. Renaudin, P. Vivet and F. Robin. ASPRO-216: A Standard-Cell QDI 16-bit RISC Asynchronous Microprocessr. Proc. of 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC '98). 1998. pages 22-32.
29. Scalable Network Technologies. Qualnet. http://www.scalable-networks.com/ .
30. M. Takai, J. Martin and R. Bagrodia. Effects of Wireless Physical Layer Modeling in Mobile Ad Hoc Networks. Proceedings of the 2001 ACM International Symposium on Mobile Ad Hoc Networking and Computing (MobiHoc 2001), October 2001. pages 87-94.
31. Michael Taylor. The Raw Prototype Design Document, ftp://ftp.cag.lcs.mit. edu/pub/raw/documents/RavSpec99.pdf.2002.
32. M. Taylor et al. The Raw Microprocessor: A Computational Fabric for Software Circuits and General Purpose Programs. IEEE Micro, Mar/Apr 2002.
33. J. Teifel. Interchip Communication in Asynchronous VLSI Systems. Cornell Computer Systems Lab Technical Report CSLTR-2002-1027, October 2002.
34. Wireless Integrated Network Sensors, University of California, Los Angeles, Available: http://www.janet.ucla.edu/WINS
35. Wireless Sensing Networks Project, Rockwell Scientific. Available: http://wins.rsc.rockwell.com
36. X. Zeng, R. Bagrodia, M. Gerla. GloMoSim: a Library for Parallel Simulation of Large-scale Wireless Networks. Proceedings of the 12th Workshop on Parallel and Distributed Simulations - PADS '98, Banff, Alberta, Canada, May 1998.