A 700uA, 405MHz fractional-N all digital frequency-locked loop for MICS band applications

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2010, Pages 409-412

  Shashidharan, S ^a   Khalil, W ^b   Chakraborty, S ^c   Kiaei, S ^a   Copani, T ^a   Bakkaloglu, B ^a  

^a Arizona State University   (United States)

^b OHIO STATE UNIVERSITY   (United States)

^c TEXAS INSTRUMENTS   (United States)

Author keywords

DACs; Digital PLLs; Type I PLLs

Indexed keywords

ALL DIGITAL; CMOS PROCESSS; CURRENT STEERING; DIE AREA; FEEDBACK PATHS; FIRST-ORDER; FRACTIONAL-N; FREQUENCY DISCRIMINATORS; FREQUENCY RESOLUTIONS; FREQUENCY-LOCKED-LOOP; FSK MODULATOR; HIGH RESOLUTION; LOOP FILTER; MEDICAL IMPLANTS; PHASE ACCUMULATORS; QUIESCENT CURRENTS; REFERENCE PATH; SINGLE-BIT;

CMOS INTEGRATED CIRCUITS; COMMUNICATION SYSTEMS; DIGITAL INTEGRATED CIRCUITS; FREQUENCY SYNTHESIZERS; INTEGRATED CIRCUITS; RADIO; RADIO WAVES;

IIR FILTERS;

EID: 77954488939     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2010.5477249     Document Type: Conference Paper

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