Exploring complex 2D layouts for 22nm node using double patterning/double etch approach for trench levels

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 7641, Issue , 2010, Pages

  Jessen, Scott W ^a   Prins, Steven L ^a   Blatchford, James W ^a   Dillon, Brian W ^b   Progler, Christopher J ^b  

^a TEXAS INSTRUMENTS   (United States)

^b PHOTRONICS INC   (United States)

Author keywords

Double pattern; Low k1 imaging; Trench

Indexed keywords

2D METAL; AREA REQUIREMENT; AREA SCALING; DESIGN RULES; DOUBLE PATTERNING; FEATURE TYPES; LINE ENDS; LOGIC NODES; LOW K1 IMAGING; METAL LEVELS; WAFER SCALE;

IMAGING TECHNIQUES; LANDING; NANOTECHNOLOGY;

MACHINE DESIGN;

EID: 77953264641     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.848350     Document Type: Conference Paper

References (2)

1. J. Blatchford et al., ECS Transactions, to be published.
2. V. Wiaux, S. Verhaegen, F. Iwamoto, M. Maenhoudt, T. Matsuda, S. Postnikov, and G. Vandenberghe, Proc. SPIE 7140, 71401X (2008).