16nm functional 0.039μm2 6T-SRAM cell with nano injection lithography, nanowire channel, and full TiN gate

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Chen, Hou Yu ^a   Chen, Chun Chi ^a   Hsueh, Fu Kuo ^a   Liu, Jan Tsai ^a   Shen, Chih Yen ^a   Hsu, Chiung Chih ^a   Shy, Shyi Long ^a   Lin, Bih Tiao ^a   Chuang, Hsi Ta ^a   Wu, Cheng San ^a   Hu, Chenming ^a,b   Huang, Chien Chao ^a   Yang, Fu Liang ^a  

^a NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; CIRCUIT DESIGNS; CMOS DEVICES; CMOS SCALING; ENTRY COSTS; LINEWIDTH ROUGHNESS; MASK LESS; PATTERN RESOLUTION; PHOTORESIST-FREE; PROXIMITY EFFECTS; SHORT CHANNELS; SIMPLIFIED INTEGRATION; SINGLE GATES; TIN GATES;

CMOS INTEGRATED CIRCUITS; ELECTRON DEVICES; NANOWIRES; STATIC RANDOM ACCESS STORAGE; TITANIUM NITRIDE; VOLTAGE REGULATORS;

MOS DEVICES;

EID: 77952409472     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424252     Document Type: Conference Paper

References (7)

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