Top-gated FETs/Inverters with diblock copolymer self-assembled 20 nm contact holes

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2009, Pages

  Chang, Li Wen ^a   Lee, T L ^a,b   Wann, Clement H ^a,b   Chang, C Y ^a,b   Philip Wong, H S ^a  

^a Stanford University   (United States)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INVERTERS; CMOS PROCESSS; CONTACT HOLES; DIBLOCK COPOLYMER; FUNCTIONAL CIRCUITS; GUIDING LAYER; MOS-FET; SELF ASSEMBLY PROCESS; SELF-ASSEMBLED; SELF-ASSEMBLED DIBLOCK COPOLYMERS; SOURCE AND DRAINS; WAFER LEVEL;

BLOCK COPOLYMERS; COPOLYMERIZATION; ELECTRON DEVICES; PHOTOLITHOGRAPHY; SELF ASSEMBLY;

CMOS INTEGRATED CIRCUITS;

EID: 77952331121     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2009.5424272     Document Type: Conference Paper

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