A 1.4V signal swing hybrid CLS-opamp/ZCBC pipelined ADC using a 300mV output swing opamp

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 53, Issue , 2010, Pages 302-303

  Hershberg, Benjamin P ^a   Weaver, Skyler T ^a   Moon, Un Ku ^a  

^a OREGON STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; CORRELATED DOUBLE SAMPLING; CURRENT SOURCES; EFFECTIVE GAIN; HIGH EFFICIENCY; INTRINSIC DEVICE; LEVEL-SHIFTING; LOW POWER; OPEN LOOPS; OUTPUT SWING; PIPELINED ADCS; POWER EFFICIENCY; SCALED TECHNOLOGIES; SIGNAL SWINGS; ZERO-CROSSING DETECTORS; ZERO-CROSSINGS;

ANALOG TO DIGITAL CONVERSION; DESIGN;

OPERATIONAL AMPLIFIERS;

EID: 77952156678     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2010.5433894     Document Type: Conference Paper

References (3)

1. B.R. Gregoire, U. Moon, "An Over-60dB True Rail-to-Rail Performance Using Correlated Level Shifting and an Opamp With Only 30 dB Loop Gain," ISSCC Dig. Tech Papers, pp. 540-541, Feb. 2008.
2. T. Sepke, J. K. Fiorenza, et al., "Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies," ISSCC Dig. Tech Papers, pp. 220-221, Feb. 2006.
3. L. Brooks, H-S Lee, "A 12b 50MS/s Fully Differential Zero-Crossing Based ADC Without CMFB," ISSCC Dig. Tech. Papers, pp.166-167, Feb. 2009.