Intel® Nehalem processor core made FPGA synthesizable

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2010, Pages 3-12

  Schelle, Graham ^a   Collins, Jamison ^a   Schuchman, Ethan ^a   Wang, Perrry ^a   Zou, Xiang ^a   Chinya, Gautham ^a   Plate, Ralf ^a   Mattner, Thorsten ^a   Olbrich, Franz ^a   Hammarlund, Per ^a   Singhal, Ronak ^a   Brayton, Jim ^a   Steibl, Sebastian ^a   Wang, Hong ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Emulator; FPGA; Intel Nehalem; Synthesizable core

Indexed keywords

ARCHITECTURAL FEATURES; CLOCK GATING; COMPLEX DESIGNS; CYCLE ACCURATE; FPGA ARCHITECTURES; HIGH-SPEED; MICRO ARCHITECTURES; MULTI-FPGA; OUT OF ORDER; PROCESSOR CORES; RTL CODES;

COMPUTER OPERATING SYSTEMS; DESIGN; LOGIC GATES; NANOTECHNOLOGY;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 77951545079     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1723112.1723116     Document Type: Conference Paper

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