Energy efficient joint scheduling and multi-core interconnect design

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2010, Pages 879-884

  Xu, Cathy Qun ^a   Xue, Chun Jason ^b   He, Yi ^c   Sha, Edwin H M ^a  

^a UNIVERSITY OF TEXAS AT DALLAS   (United States)

^b CITY UNIVERSITY OF HONG KONG   (Hong Kong)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC; COMMUNICATION COST; DSP APPLICATION; DYNAMIC ENERGY CONSUMPTION; ENERGY CONSUMPTION; ENERGY EFFICIENT; HIGH LEVEL SYNTHESIS; HIGH-PERFORMANCE INTERCONNECT; INTERCONNECT DESIGN; JOINT SCHEDULING; MULTI CORE; MULTICORE ARCHITECTURES; POWER SAVINGS; SCHEDULING TECHNIQUES; STATIC ENERGY;

BUSES; COMPUTATIONAL EFFICIENCY; COMPUTER AIDED DESIGN; COST REDUCTION; DATA TRANSFER; DIGITAL INTEGRATED CIRCUITS; ELECTRIC LOAD FORECASTING;

SCHEDULING ALGORITHMS;

EID: 77951286669     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2010.5419678     Document Type: Conference Paper

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