|
Volumn , Issue , 2009, Pages 793-796
|
Effective die-package-PCB co-design methodology and its deployment in 10 Gbps serial link transceiver FPGA packages
a a |
Author keywords
Design methodology; Multilayers; Packaging; System analysis and design; System modeling
|
Indexed keywords
BGA PACKAGE;
CO-DESIGN METHODOLOGY;
COSIMULATION;
DESIGN METHODOLOGY;
FPGA APPLICATIONS;
GBPS SERIAL LINKS;
HIGH-SPEED TRANSCEIVERS;
MODELING TECHNIQUE;
MULTI-CHANNEL;
PACKAGING SYSTEM;
RETURN LOSS;
DESIGN;
DIES;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
INSULATING MATERIALS;
JITTER;
MICROWAVES;
MULTILAYERS;
POLYCHLORINATED BIPHENYLS;
PRINTED CIRCUITS;
SYSTEMS ANALYSIS;
TRANSCEIVERS;
PACKAGING;
|
EID: 77949980610
PISSN: 0149645X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/MWSYM.2009.5165816 Document Type: Conference Paper |
Times cited : (10)
|
References (6)
|