Synchronized generation of directed tests using satisfiability solving

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2010, Pages 251-256

  Qin, Xiaoke ^a   Chen, Mingsong ^a   Mishra, Prabhat ^a  

^a University of Florida   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MODEL CHECKING; SYSTEM-ON-CHIP; VLSI CIRCUITS;

BOUNDED MODEL CHECKING; DIRECTED TESTING; FUNCTIONAL VERIFICATION; SAT INSTANCES; SAT-SOLVING; SATISFIABILITY SOLVING; TEST GENERATIONS; TWO DIRECTIONS;

EMBEDDED SYSTEMS;

EID: 77949939120     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.Design.2010.47     Document Type: Conference Paper

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