Smaller split L-1 data caches for multi-core processing systems

I-SPAN 2009 - The 10th International Symposium on Pervasive Systems, Algorithms, and Networks

Volumn , Issue , 2009, Pages 74-79

  Adamo, Oluwayomi ^a   Naz, Afrin ^a   Janjusic, Tommy ^a   Kavi, Krishna ^a   Chung, Chung Ping ^b  

^a Center for Advanced Research and Technology   (United States)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Cache memories; Split data cache; Uniform cache access patterns

Indexed keywords

ACCESS PATTERNS; ASSOCIATIVITY; BLOCK SIZES; CACHE ACCESS; CACHE DESIGN; CENTRAL MOMENTS; DATA CACHES; EMBEDDED BENCHMARKS; HOT SPOT; MULTI CORE; NON-UNIFORM ACCESS; PERFORMANCE IMPROVEMENTS; PROCESSING ELEMENTS; SCALAR DATA; SINGLE CHIPS; SPLIT CACHE; UNIFORM CACHE ACCESS PATTERNS;

CACHE MEMORY;

EID: 77949832937     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/I-SPAN.2009.118     Document Type: Conference Paper

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