An FPGA implementation of the time domain deadbeat algorithm for control applications

2009 NORCHIP

Volumn , Issue , 2009, Pages

  Alecsa, Bogdan Claudiu ^a   Onea, Alexandru ^a  

^a GHEORGHE ASACHI TECHNICAL UNIVERSITY OF IASI   (Romania)

Author keywords

DC motor; Deadbeat; FPGA; System generator

Indexed keywords

ANALOG TO DIGITAL CONVERTERS; CONTROL APPLICATIONS; CONTROL HARDWARES; CONTROLLED PROCESS; DEADBEAT; DEADBEAT ALGORITHM; DESIGN AND SIMULATION; DIGITAL CONTROLLERS; DIGITAL-TO-ANALOG CONVERTERS; FPGA IMPLEMENTATIONS; HARDWARE INTERFACES; SOFTWARE TOOL; SYSTEM GENERATOR; TIME DOMAIN;

ANALOG TO DIGITAL CONVERSION; COMPUTER SOFTWARE; CONTROLLERS; DC MOTORS; DIGITAL INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION; MULTICARRIER MODULATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 77949643248     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NORCHP.2009.5397839     Document Type: Conference Paper

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