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Volumn , Issue , 2009, Pages 1015-1018
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A pure logic CMOS based low power non-volatile random access memory for RFID application
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Author keywords
CMOS; Low power; Non volatile random access memory; Two dimension array architecture
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Indexed keywords
ARRAY ARCHITECTURE;
LOW POWER;
LOW-POWER CONSUMPTION;
NON-VOLATILE RANDOM ACCESS MEMORIES;
POWER CONSUMPTION;
POWER OPTIMIZATION;
RFID APPLICATIONS;
SIMULATION RESULT;
TWO-DIMENSION;
WRITE OPERATIONS;
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
CMOS INTEGRATED CIRCUITS;
ELECTRIC POWER SUPPLIES TO APPARATUS;
RANDOM ACCESS STORAGE;
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EID: 77949549755
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/ASICON.2009.5351520 Document Type: Conference Paper |
Times cited : (1)
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References (5)
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