32×32 winner-take-all matrix with single winner selection

Electronics Letters

Volumn 46, Issue 5, 2010, Pages 333-335

  Zuccarello, P ^a   Pardo, F ^a   De La Plaza, A ^b   Boluda, J A ^a  

^a UNIVERSITY OF VALENCIA   (Spain)

^b UNIVERSIDAD DE BUENOS AIRES   (Argentina)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOGUE AMPLIFIERS; CASCODE; CURRENT RESOLUTION; HIGH RESOLUTION; INPUT CURRENT; MATRIX; TIME RESPONSE; WINNER TAKE ALLS;

DIGITAL INTEGRATED CIRCUITS;

NAVIGATION SYSTEMS;

EID: 77949398777     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el.2010.1963     Document Type: Article

References (6)

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2. Pardo, F., Boluda, J.A., Vegara, F., and Zuccarello, P.: ' On the advantages of asynchronous pixel reading and processing for high-speed motion estimation ', Lect. Notes Comput. Sci., 2008, 5358, p. 205-215
3. Indiveri, G., Oswald, P., and Kramer, J.: ' An adaptive visual tracking sensor with hysteretic winner-take-all network ', IEEE Int. Symp. on Circuits and Systems (ISCAS), May, 2002, 2, p. 324-327
4. Lazzaro, J., Rayckebusch, S., Mahowald, M.A., and Mead, C.A.: ' Winner-take-all networks of O(n) complexity ', (California Institute of Technology, Pasadena, CA, USA, 1988), 1, p. 703-711
5. Sekerkiran, B., and Cilingiroglu, U.: ' Precision improvement in current-mode winner-take-all circuits using gain-boosted regulated-cascode CMOS stages ', Proc. IEEE Int. Joint Conf. on Neural Networks, May, 1998, 1, p. 553-556
6. Indiveri, G.: ' A current-mode hysteretic winner-take-all network, with excitatory and inhibitory coupling ', Analog Integr. Circuits Signal Process., 2001, 28, (3), p. 279-291 0925-1030