Particle rendering engine in DSP and FPGA

Proceedings - 11th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems, ECBS 2004

Volumn , Issue , 2004, Pages 361-368

  Zemčík, Pavel ^a   Herout, Adam ^a   Crha, Luděk ^a   Fučík, Otto ^a   Tupec, Pavel ^a  

^a BRNO UNIVERSITY OF TECHNOLOGY   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BANDWIDTH; COMPUTER GRAPHICS; COMPUTER HARDWARE; DYNAMIC RANDOM ACCESS STORAGE; MATHEMATICAL MODELS; MATHEMATICAL TRANSFORMATIONS; PROGRAM PROCESSORS; STATIC RANDOM ACCESS STORAGE;

BLOCK MEMORY TRANSFER; GRAPHIC SUBSYSTEMS; PARTICLE RENDERING ENGINES;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 7744237122     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Gross, M: "Point Based Computer Graphics", Spring Conference of Computer Graphics 2002, Budmerice, Slovakia, 2002
2. Rusinkiewicz, S: "Surface splatting", Proceedings of SIGGRAPH 2001, USA, 2001
3. Zernčík, P: "Hardware Acceleration of Graphics and Imaging Algorithms Using FPGAs", SCCG 2002, Budmerice, Slovakia, 2002
4. Zernčík, P, Tišnovský, P, Herout, A: "Particle Rendering Pipeline", SCCG2003, Budmerice, Slovakia, 2003
5. VirtexTM 2.5V Field Programmable Gate Arrays, Xilinx, DS003-1 (v2.5), April 2, 2001, USA, 2001, (available at http://www.xilinx.com)
6. TMS3BOC6711, TMS320C6711B Floating point Digital Signal Processors, Texas Instruments, SPSS088B, September 2001, USA, 2001, (available at http://www.ti.com)