FPGA implementation of the interior-point algorithm with applications to collision detection

Proceedings - IEEE Symposium on Field Programmable Custom Computing Machines, FCCM 2009

Volumn , Issue , 2009, Pages 295-298

  Wu, Chih Hung ^a   Memik, Seda Ogrenci ^a   Mehrotra, Sanjay ^a  

^a Northwestern University   (United States)

Author keywords

Inter frame collision; Interior point; Linear programming

Indexed keywords

COLLISION DETECTION; FPGA IMPLEMENTATIONS; HIGH PERFORMANCE SYSTEMS; INTER-FRAME; INTERIOR POINT; INTERIOR POINT ALGORITHM; LIMITING FACTORS; LINEAR PROGRAMS; OPTIMIZATION PROBLEMS; RUN-TIME EFFICIENCY; TRANSLATIONAL MOTIONS;

COMPUTERS; DYNAMIC PROGRAMMING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); LINEAR PROGRAMMING; LINEARIZATION; OPTIMIZATION;

ALGORITHMS;

EID: 74349118170     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2009.38     Document Type: Conference Paper

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