A 1-V 60-μ W 16-channel interface chip for implantable neural recording

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2009, Pages 507-510

  Liew, Wen Sin ^a   Zou, Xiaodan ^a   Yao, Libin ^a   Lian, Yong ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL INTERFACE; CMOS TECHNOLOGY; EFFICIENT POWER; FRONT-END AMPLIFIER; FRONT-END CHANNELS; GAIN SETTINGS; LOW POWER; LOW-POWER DISSIPATION; LOW-VOLTAGE; NEURAL RECORDINGS; NEURAL SIGNAL RECORDING; OUTPUT DATA; OUTPUT SWING; POWER EFFICIENCY; POWER EFFICIENT; SAFETY ISSUES; SAR ADC; SIMULTANEOUS RECORDING; TOTAL POWER; TUNABLE BANDPASS FILTERING;

CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUITS; MULTICARRIER MODULATION;

SYNTHETIC APERTURES;

EID: 74049143517     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2009.5280795     Document Type: Conference Paper

References (8)

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