메뉴 건너뛰기




Volumn , Issue , 2009, Pages 164-167

Performance of a trench PMOS gated, planar, 1.2 kV clustered insulated gate bipolar transistor in NPT technology

Author keywords

[No Author keywords available]

Indexed keywords

2D SIMULATIONS; CIRCUIT PERFORMANCE; CURRENT SATURATION; GATE STRUCTURE; GATE VOLTAGES; POWER DEVICES; SATURATION CURRENT; SHORT CIRCUIT; TRENCH GATES;

EID: 72449176481     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPSD.2009.5158027     Document Type: Conference Paper
Times cited : (9)

References (11)
  • 1
    • 0020310822 scopus 로고
    • Insulated gate rectifier (IGR): A new power switching device
    • IEDM
    • B. J. Baliga, M. S. Adler, P. V. Gray, R. P. Love, and N. Zommer, "Insulated gate rectifier (IGR): A new power switching device," in Proc.Tech. Dig. IEDM, 1982, pp. 264-267
    • (1982) Proc.Tech. Dig , pp. 264-267
    • Baliga, B.J.1    Adler, M.S.2    Gray, P.V.3    Love, R.P.4    Zommer, N.5
  • 2
    • 0027891679 scopus 로고
    • A4500V injection enhanced Insulated Gate Bipolar Transistor (IEGT) in a mode similar to a thyristor
    • M. Kitagawa, I. Omura, S. Hasegawa, T. Inoue, and A. Nakagawa, "A4500V injection enhanced Insulated Gate Bipolar Transistor (IEGT) in a mode similar to a thyristor," in IEDM Tech. Dig., 1993, pp. 679-682.
    • (1993) IEDM Tech. Dig , pp. 679-682
    • Kitagawa, M.1    Omura, I.2    Hasegawa, S.3    Inoue, T.4    Nakagawa, A.5
  • 3
    • 0029709790 scopus 로고    scopus 로고
    • H. Takahashi, H Haruguchi, H. Hagino, T. Yamada, Carrier stored Trench-gate Bipolar Transistor -A Novel Power Device for High voltage application-, Proceedings of the 8th.ISPSD 96, pp349-pp352,1996
    • H. Takahashi, H Haruguchi, H. Hagino, T. Yamada, "Carrier stored Trench-gate Bipolar Transistor -A Novel Power Device for High voltage application-," Proceedings of the 8th.ISPSD 96, pp349-pp352,1996
  • 4
    • 0021640213 scopus 로고
    • MOS controlled thyristors
    • V. A. Temple, "MOS controlled thyristors," in IEDM Tech. Dig., 1984, pp. 282-285.
    • (1984) IEDM Tech. Dig , pp. 282-285
    • Temple, V.A.1
  • 5
    • 0025385344 scopus 로고
    • The MOS-gated emitter switched thyristor
    • B. J. Baliga, The MOS-gated emitter switched thyristor, IEEE Electron Device Lett. 11 (1990) 75-77
    • (1990) IEEE Electron Device Lett , vol.11 , pp. 75-77
    • Baliga, B.J.1
  • 6
    • 0003385409 scopus 로고    scopus 로고
    • Clustered Insulated Gate Bipolar Transistor (CIGBT): A New Power Semiconductor Device
    • E. M. Sankara Narayanan, et al., "Clustered Insulated Gate Bipolar Transistor (CIGBT): A New Power Semiconductor Device," Proceeding l0th IWPSD, 1999, pp. 1307-1312.
    • (1999) Proceeding l0th IWPSD , pp. 1307-1312
    • Sankara Narayanan, E.M.1
  • 7
    • 4944240005 scopus 로고    scopus 로고
    • Influence of the design parameters on the performance of 1.7 kV, NPT, planar Clustered Insulated Gate Bipolar Transistor (CIGBT)
    • K. Vershinin, et al., "Influence of the design parameters on the performance of 1.7 kV, NPT, planar Clustered Insulated Gate Bipolar Transistor (CIGBT)" ISPSD'04, pp. 269-272
    • ISPSD'04 , pp. 269-272
    • Vershinin, K.1
  • 8
    • 77949932154 scopus 로고    scopus 로고
    • K. Vershinin et al Experimental Demonstration of a 1.2kV Trench Clustered Insulated Gate Bipolar Transistor in Non-Punch-Through Technology, ISPSD'06
    • K. Vershinin et al "Experimental Demonstration of a 1.2kV Trench Clustered Insulated Gate Bipolar Transistor in Non-Punch-Through Technology", ISPSD'06
  • 9
    • 77949977310 scopus 로고    scopus 로고
    • M. Sweet et al., Experimental Demonstration of 3.3kV Clustered Insulated Gate Bipolar Transistor in Non-Punch-Through Technology, ISPSD'08, pp. 48-51
    • M. Sweet et al., "Experimental Demonstration of 3.3kV Clustered Insulated Gate Bipolar Transistor in Non-Punch-Through Technology", ISPSD'08, pp. 48-51
  • 10
    • 77949991387 scopus 로고    scopus 로고
    • Sysnopsys TCAD Sentaurus Device Package, 2007
    • Sysnopsys TCAD Sentaurus Device Package, 2007
  • 11
    • 0025512595 scopus 로고
    • Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modeling
    • Nov
    • G. K. Wachutka, Rigorous thermodynamic treatment of heat generation and conduction in semiconductor device modeling,[ IEEE Trans. Comput-Aided Design Integr. Circuits Syst., vol. 9, no. 11, pp. 1141-1149, Nov. 1990.
    • (1990) IEEE Trans. Comput-Aided Design Integr. Circuits Syst , vol.9 , Issue.11 , pp. 1141-1149
    • Wachutka, G.K.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.