Low voltage (Vdd∼0.6 V) SRAM operation achieved by reduced threshold voltage variability in SOTB (silicon on thin BOX)

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2009, Pages 150-151

  Tsuchiya, Ryuta ^a   Sugii, Nobuyuki ^a   Ishigaki, Takashi ^a   Morita, Yusuke ^a   Yoshimoto, Hiroyuki ^a   Torii, Kazuyoshi ^a   Kimura, ShiN'Ichiro ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; LOW DOSE; LOW POWER; LOW VOLTAGES; NOISE PERFORMANCE; STATIC NOISE MARGIN; THRESHOLD VOLTAGE VARIABILITY;

STATIC RANDOM ACCESS STORAGE;

EID: 71049179442     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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3. Y. Morita et al., Symp. VLSI Tech., p. 166 (2008).
4. N. Sugii et al., IEDM Tech. Dig., p. 249 (2008).
5. K. J. Kuhn, IEDM Tech. Dig., p. 471 (2007).
6. C.F.-Beranger et al., IEDM Tech. Dig., p. 267 (2007).