Logicalization of communication traces from parallel execution

Proceedings of the 2009 IEEE International Symposium on Workload Characterization, IISWC 2009

Volumn , Issue , 2009, Pages 34-43

  Xut, Qiang ^a   Subhlokl, Jaspal ^b   Zhengt, Rong ^b   Vosst, Sara ^b,c  

^a CGG   (United States)

^b University of Houston   (United States)

^c Department of Business Administration and Economics   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION STRUCTURES; MATRIX; MESSAGE EXCHANGE; MPI PROGRAMS; PARALLEL EXECUTIONS; PARALLEL PROGRAM; PERFORMANCE MODELING AND ANALYSIS; PHYSICAL PROCESS; TOPOLOGY IDENTIFICATION; VOLUME REDUCTIONS;

COMMUNICATION; PARALLEL ARCHITECTURES;

TRACE ANALYSIS;

EID: 70649104127     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IISWC.2009.5306796     Document Type: Conference Paper

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