An innovative die to wafer 3D integration scheme : Die to wafer oxide or copper direct bonding with planarised oxide inter-die filling

2009 IEEE International Conference on 3D System Integration, 3DIC 2009

Volumn , Issue , 2009, Pages

  Di Cioccio, Léa ^a   Gueguen, Pierric ^a   Taibi, Rachid ^b   Signamarcheix, Thomas ^a   Bally, Laurent ^a   Vandroux, Laurent ^a   Zussy, Marc ^a   Verrun, Sophie ^a   Dechamp, Jérôme ^a   Leduc, Patrick ^a   Assous, Myriam ^a   Bouchu, David ^a   De Crecy, François ^a   Chapelon, Laurent Luc ^b   Clavelier, Laurent ^a  

^a CEA LETI   (France)

^b STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; BONDING MEDIUM; COPPER DIRECT BONDING; DIE FILLING; DIRECT BONDING; HIGH DEPOSITION RATES; LOW STRESS; OXIDE LAYER; SMOOTH SURFACE; WAFER STACKING;

COPPER OXIDES; DIES; SILICON WAFERS; THREE DIMENSIONAL;

WAFER BONDING;

EID: 70549086034     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/3DIC.2009.5306534     Document Type: Conference Paper

References (4)

1. P.Leduc, L Di cioccio et al, VLSI 2008, proc.p.76-78 (2008).
2. P. Gueguen et al. Boston MRS (2008)
3. L. Di Cioccio et al. IITC (2009)
4. P Leduc et al. This conference