-
1
-
-
57849139558
-
45nm Design for Manufacturing
-
C. Webb, 45nm Design for Manufacturing. Intel Technology e-Joumal 12, 121-130 (2008).
-
(2008)
Intel Technology e-Joumal
, vol.12
, pp. 121-130
-
-
Webb, C.1
-
5
-
-
28344452134
-
-
W.R. Davis, J. Wilson, S. Mick, J. Xu, H. Hua, C. Mineo, A.M. Sule, M. Steer and P.D. Franzon, Design and Test of Computers, 2005, pp.498-510. 155
-
W.R. Davis, J. Wilson, S. Mick, J. Xu, H. Hua, C. Mineo, A.M. Sule, M. Steer and P.D. Franzon, Design and Test of Computers, 2005, pp.498-510. 155
-
-
-
-
7
-
-
0022204512
-
-
WEAVER:, Nevada, Las Vegas
-
R. Joobbani and D.P. Siewiorek, WEAVER: a knowledge-based routing expert. Proceedings of the 22nd ACM/IEEE conference on Design automation, Nevada, Las Vegas, 1985, pp.266-272.
-
(1985)
a knowledge-based routing expert. Proceedings of the 22nd ACM/IEEE conference on Design automation
, pp. 266-272
-
-
Joobbani, R.1
Siewiorek, D.P.2
-
9
-
-
0031125464
-
A parallel genetic algorithm for performance-driven VLSI routing
-
J. Lienig, A parallel genetic algorithm for performance-driven VLSI routing. IEEE Transactions on Evolutionary Computation 1, 29-39 (1997).
-
(1997)
IEEE Transactions on Evolutionary Computation
, vol.1
, pp. 29-39
-
-
Lienig, J.1
-
10
-
-
34547171297
-
Circuit Simulation Based Obstacle-Aware Steiner Routing
-
San Francisco, CA
-
Y. Shi, P. Mesa, H.Yu and L.He, Circuit Simulation Based Obstacle-Aware Steiner Routing, Proceedings of the 43rd annual conference on Design automation, San Francisco, CA, 2006, pp.385-388.
-
(2006)
Proceedings of the 43rd annual conference on Design automation
, pp. 385-388
-
-
Shi, Y.1
Mesa, P.2
Yu, H.3
He, L.4
-
11
-
-
11244299747
-
-
Y. Hu, T. Jing, X. Hong, Z. Feng, X. Hu and G. Yan, An Efficient Rectilinear Steiner Minimum Tree Algorithm Based on Ant Colony Optimization. Proceedings of IEEE International Conference on Communications, Circuits and Systems 2, 1276-1280 (2004).
-
Y. Hu, T. Jing, X. Hong, Z. Feng, X. Hu and G. Yan, An Efficient Rectilinear Steiner Minimum Tree Algorithm Based on Ant Colony Optimization. Proceedings of IEEE International Conference on Communications, Circuits and Systems 2, 1276-1280 (2004).
-
-
-
-
12
-
-
34548105491
-
An Ant Algorithm for the Steiner Tree Problem in graphs. Applications of Evolutionary Computing
-
Valencia, Spain
-
L. Luyet, S. Varone and N. Zufferey, An Ant Algorithm for the Steiner Tree Problem in graphs. Applications of Evolutionary Computing. Evo Workshops, Valencia, Spain, 2007, pp.42-51.
-
(2007)
Evo Workshops
, pp. 42-51
-
-
Luyet, L.1
Varone, S.2
Zufferey, N.3
-
15
-
-
28344432776
-
Placement and Routing in 3D Integrated Circuits
-
C. Ababei, Y. Feng, B. Goplen, H. Mogal, T. Zhang, K. Bazargan, and S. Sapatnekar, Placement and Routing in 3D Integrated Circuits. IEEE Design & Test 22, 6, 520-531 (2005).
-
(2005)
IEEE Design & Test
, vol.22
, Issue.6
, pp. 520-531
-
-
Ababei, C.1
Feng, Y.2
Goplen, B.3
Mogal, H.4
Zhang, T.5
Bazargan, K.6
Sapatnekar, S.7
-
18
-
-
0002012598
-
The ant colony optimization metaheuristic
-
M. Dorigo and D.G. Caro, "The ant colony optimization metaheuristic". New ideas in optimization, 1999, pp. 11-30.
-
(1999)
New ideas in optimization
, pp. 11-30
-
-
Dorigo, M.1
Caro, D.G.2
-
19
-
-
70450266575
-
-
T. Stutzle and M. Dorigo, ACO Algorithms for the traveling salesman Problem. K. Miettinen, P. Neittaanmaki, Evolutionary Algorithms in Engineering and Computer Science, 1999, pp.160-184.
-
T. Stutzle and M. Dorigo, ACO Algorithms for the traveling salesman Problem. K. Miettinen, P. Neittaanmaki, Evolutionary Algorithms in Engineering and Computer Science, 1999, pp.160-184.
-
-
-
-
24
-
-
70450254276
-
Characterization of a Printed Circuit Board Via. B.S.E.E
-
EAS-ECE-2000-09, 1998
-
B.J. LaMeres, Characterization of a Printed Circuit Board Via. B.S.E.E., Montana State University Technical Report EAS-ECE-2000-09, 1998.
-
Montana State University Technical Report
-
-
LaMeres, B.J.1
-
26
-
-
0033703013
-
Manhattan or NonManhattan- A Study of Alternative VLSI Routing Architectures
-
Chicago, Illinois
-
C. Koh, P.H. Madden, Manhattan or NonManhattan- A Study of Alternative VLSI Routing Architectures. Proceedings of the 10th Great Lakes symposium on VLSI, Chicago, Illinois, 2000, pp.47-52.
-
(2000)
Proceedings of the 10th Great Lakes symposium on VLSI
, pp. 47-52
-
-
Koh, C.1
Madden, P.H.2
-
29
-
-
67650505784
-
Routability-Driven Placement and White Space Allocation
-
C. Li, M. Xie, C. Koh and P.H. Madden, Routability-Driven Placement and White Space Allocation", Computer-Aided Design of Integrated Circuits and Systems 22, 410-419 (2003).
-
(2003)
Computer-Aided Design of Integrated Circuits and Systems
, vol.22
, pp. 410-419
-
-
Li, C.1
Xie, M.2
Koh, C.3
Madden, P.H.4
-
30
-
-
0031683754
-
Analysis, Reduction and Avoidance of Crosstalk on VLSI Chips
-
T. Stohr, M. Alt, A. Hetzel and J. Koehl, Analysis, Reduction and Avoidance of Crosstalk on VLSI Chips. Proceedings of the 1998 international symposium on Physical design, 1998, pp.211-218.
-
(1998)
Proceedings of the 1998 international symposium on Physical design
, pp. 211-218
-
-
Stohr, T.1
Alt, M.2
Hetzel, A.3
Koehl, J.4
|