A 1.8-GHz 33-dBm P 0.1-dB CMOS T/R switch using stacked FETs with feed-forward capacitors in a floated well structure

IEEE Transactions on Microwave Theory and Techniques

Volumn 57, Issue 11, 2009, Pages 2661-2670

  Ahn, Minsik ^a   Kim, Hyun Woong ^b   Lee, Chang Ho ^a   Laskar, Joy ^b  

^a Samsung Design Center   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

0.1 dB compression point; Feed forward capacitor; Floated well bias; High power CMOS switch

Indexed keywords

CMOS SWITCH; COMPRESSION POINTS; FEED-FORWARD; FEED-FORWARD CAPACITOR; FLOATED WELL BIAS; HIGH-POWER;

ANTENNAS; BANDPASS FILTERS; CAPACITANCE; CAPACITORS; ELECTRIC LOAD MANAGEMENT; FIELD EFFECT TRANSISTORS; MESFET DEVICES; SEMICONDUCTOR SWITCHES;

SWITCHES;

EID: 70450257538     PISSN: 00189480     EISSN: None     Source Type: Journal    
DOI: 10.1109/TMTT.2009.2031928     Document Type: Article

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