Implementation of 3D-DCT based video encoder/decoder system

SCS 2003 - International Symposium on Signals, Circuits and Systems, Proceedings

Volumn 2, Issue , 2003, Pages 389-392

  Abdelhalim, M B ^a   Salama, A E ^a  

^a CAIRO UNIVERSITY   (Egypt)

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; HARDWARE; INTEGRATED CIRCUIT DESIGN; MOTION ANALYSIS; MOTION COMPENSATION;

DCT-BASED; HARDWARE IMPLEMENTATIONS; MOTION VECTORS; QUANTIZERS; VIDEO ENCODER; VIDEO SYSTEMS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 70450196393     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SCS.2003.1227071     Document Type: Conference Paper

References (6)

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2. M. Servais and G. De Jager. Video compression using the 3-D DCT. Undergraduate thesis, electrical engineering, University of Kape Town, 1996.
3. A. E. Salama, A. Galal, G. Hamdy. "VHDL implementation of the 2D-DCT for video phone applications. Undergraduate thesis, electrical engineering, Cairo University, 2000.
4. J. L Mitchell, W. B. Pennebaker, C. E. Fogg and D. J. LeGall. MPEG Video compression standard. Chapman & Hall, New York, 1997.
5. G. S. Taylor and G. M. Blair. Design for the discrete cosine transform in VLSI. Computers and Digital techniques, IEE proceedings, March 1998.
6. ALTERA device data book. ALTERA corporation. 1999