Large multipliers with fewer DSP blocks

FPL 09: 19th International Conference on Field Programmable Logic and Applications

Volumn , Issue , 2009, Pages 250-255

  De Dinechin, Florent ^a   Pasca, Bogdan ^a  

^a UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER CIRCUITS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSING;

DOUBLE PRECISION; EMBEDDED MULTIPLIERS; IMPLEMENTATION TECHNIQUES; KARATSUBA-OFMAN ALGORITHM; LARGE INTEGER MULTIPLIERS; LOGIC RESOURCES; PEAK FREQUENCIES;

FREQUENCY MULTIPLYING CIRCUITS;

EID: 70449767981     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2009.5272296     Document Type: Conference Paper

References (10)

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2. A. Karatsuba and Y. Ofman, "Multiplication of multidigit numbers on automata," Doklady Akademii Nauk SSSR, vol. 145, no. 2, pp. 293-294, 1962
3. D. Knuth, The Art of Computer Programming, vol.2: Seminumerical Algorithms, 3rd ed. Addison Wesley, 1997
4. P. L. Montgomery, "Five, six, and seven-term Karatsuba-like formulae," IEEE Transactions on Computers, vol. 54, no. 3, pp. 362-369, 2005
5. XtremeDSP for Virtex-4 FPGAs User Guide (v2.7), Xilinx Corporation, 2008
6. Virtex-5 FPGA XtremeDSP Design Considerations (v3.3), Xilinx Corporation, 2009
7. Stratix-II Device Handbook, Altera Corporation, 2004
8. Stratix-III Device Handbook, Altera Corporation, 2006
9. F. de Dinechin, "The price of routing in FPGAs," Journal of Universal Computer Science, vol. 6, no. 2, pp. 227-239, 2000
10. F. de Dinechin, J. Detrey, I. Trestian, O. Creţ, and R. Tudoran, "When FPGAs are better at floating-point than microprocessors," ÉNS Lyon, Tech. Rep. ensl-00174627, 2007, http://prunel.ccsd.cnrs.fr/ ensl-00174627.