Model checking: Algorithmic verification and debugging

Communications of the ACM

Volumn 52, Issue 11, 2009, Pages 74-84

  Clarke, Edmund M ^a   Emerson, E Allen ^b   Sifakis, Joseph ^c  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITY OF TEXAS AT AUSTIN   (United States)

^c VERIMAG   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACT MODELS; ALGORITHMIC VERIFICATION; COMMUNICATION PROTOCOLS; COMPLEX SYSTEMS; EMERSON; FORMAL SPECIFICATION; HARDWARE AND SOFTWARE; INITIAL DESIGN; INTERNATIONAL RESEARCHES; MODEL CHECKING TOOLS; REAL-TIME EMBEDDED SYSTEMS; RESEARCH AREAS; SOFTWARE DEVICE; STATE EXPLOSION PROBLEMS; TEST CASE GENERATION; THEORETICAL RESULT; USE-MODEL; VERIFICATION ALGORITHMS;

COMMUNICATION; COMPUTER SOFTWARE SELECTION AND EVALUATION; ELECTRONICS INDUSTRY; EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; LARGE SCALE SYSTEMS; NETWORK PROTOCOLS; NETWORK SECURITY; PROGRAM DEBUGGING; REAL TIME SYSTEMS; SOFTWARE DESIGN; SPECIFICATIONS; TEMPORAL LOGIC; VLSI CIRCUITS;

MODEL CHECKING;

EID: 70350786431     PISSN: 00010782     EISSN: 15577317     Source Type: Journal    
DOI: 10.1145/1592761.1592781     Document Type: Article

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