A low-complexity high-speed QR decomposition implementation for MIMO receivers

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 33-36

  Patel, Dimpesh ^a   Shabany, Mahdi ^a   Gulak, P Glenn ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; CMOS PROCESSS; CONFIGURABLE; GATE COUNT; GIVENS ROTATION; HIGH-SPEED; HOUSEHOLDER TRANSFORMATION; LARGE CORE; LARGE DIMENSIONS; LOW-COMPLEXITY; MAXIMIZE THROUGHPUT; MIMO CHANNEL; MIMO DETECTORS; MIMO RECEIVERS; MIMO SIGNAL DETECTION; MOBILE COMMUNICATIONS; PIPELINED ARCHITECTURE; PIPELINED CORDIC; PROCESSING TIME; Q R DECOMPOSITION; R MATRICES; RESOURCE UTILIZATIONS;

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; DATA PROCESSING; MULTICARRIER MODULATION; MULTIPLEXING; ROTATION; SIGNAL PROCESSING; SIGNAL RECEIVERS;

PIPELINE PROCESSING SYSTEMS;

EID: 70350155140     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5117678     Document Type: Conference Paper

References (7)

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