Low-order fixed denominator IIR VFD filter design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2009, Pages 481-484

  Kwan, Hon Keung ^a   Jiang, Aimin ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; FINITE DIFFERENCE METHOD; FIR FILTERS; TIME DOMAIN ANALYSIS;

CONSTRAINED WEIGHTED LEAST-SQUARES; FILTER DESIGNS; FRACTIONAL DELAY FILTERS; MODEL REDUCTION TECHNIQUES; ORTHOGONALITY PRINCIPLE; POLYNOMIAL FUNCTIONS; TWO STAGE DESIGNS; VARIABLE FRACTIONAL DELAY;

IIR FILTERS;

EID: 70350153046     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5117790     Document Type: Conference Paper

References (13)

1. T. I. Laakso, V. Valimaki, M. Karjalainen, and U. K. Laine, "Splitting the unit delay," IEEE Signal Processing Magazine, vol. 13, pp. 30-60, Jan. 1996.
2. H. Zhao and H. K. Kwan, "Design of 1-D stable variable fractional delay IIR filters," in Proc. of Int. Symp. on Intelligent Signal Processing and Communication Systems, Hong Kong, Dec. 13-16, 2005, pp. 517-520.
3. H. Zhao and H. K. Kwan, "Design of 1-D stable variable fractional delay IIR filters," IEEE Trans. Circuits and Systems II, vol. 54, pp. 86-90, Jan. 2007.
4. H. Zhao, H. K. Kwan, L. Wan, and L. Nie, "Design of 1-D stable variable fractional delay IIR filters using finite impulse response fitting," in Proc. of Int. Conf. on Communications, Circuits and Systems, Guilin, China, Jun. 25-28, 2006, pp. 201-205.
5. H. K. Kwan, A. Jiang, and H. Zhao, "IIR variable fractional delay digital filter design," in Proc. of TENCON, Hong Kong, Nov. 14-17, 2006, PO5.27, TEN-863.
6. H. K. Kwan and A. Jiang, "Design of IIR variable fractional delay digital filters," in Proc. of IEEE Int. Symp. on Circuits and Systems, New Orleans, May 27-30, 2007, pp. 2714-2717.
7. K. M. Tsui, S. C. Chan, and H. K. Kwan, "A new method for designing causal stable IIR variable fractional delay digital filters," IEEE Trans. Circuits and Systems II, vol. 54, pp. 999-1003, Nov. 2007.
8. H. K. Kwan and A. Jiang, "FIR, allpass, and IIR variable fractional delay digital filter design," IEEE Trans. Circuits and Systems I, 2009 (in press).
9. C. W. Farrow, "A continuously variable digital delay elements," in Proc. of IEEE Int. Symp. Circuits and Systems, Espoo, Finland, vol. 3, Jun. 6-9, 1988, pp. 2641-2645.
10. H. Brandenstein and R. Unbehauen, "Weighted least-squares approximation of FIR by IIR digital filters," IEEE Trans. Signal Processing, vol. 49, pp. 558-568, Mar. 2001.
11. H. Brandenstein and R. Unbehauen, "Least-squares approximation of FIR by IIR digital filters," IEEE Trans. Signal Processing, vol. 46, pp. 21-30, Jan. 1998.
12. H. K. Kwan and A. Jiang, "Peak-constrained weighted least squares strategy for FIR digital filter design," in Proc. of Int. Symp. on Circuits and Systems, New Orleans, May 27-30, 2007, pp. 2303-2306.
13. X. Lai, "Projected least-squares algorithms for constrained FIR filter design," IEEE Trans. Circuits and Systems I, vol. 52, pp. 2436-2443, Nov. 2005.