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Volumn , Issue , 2009, Pages 265-268

A field programmable analog array using floating gates for high resolution tuning

Author keywords

[No Author keywords available]

Indexed keywords

ADJUSTABILITY; CAPACITOR ARRAYS; CMOS TECHNOLOGY; CONTINUOUS-TIME FILTERS; FIELD PROGRAMMABLE ANALOG ARRAY; FILTER COEFFICIENTS; FLOATING GATES; FREQUENCY RANGES; HIGH RESOLUTION; TUNABILITIES;

EID: 70350142667     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2009.5117736     Document Type: Conference Paper
Times cited : (10)

References (5)
  • 4
    • 84943130890 scopus 로고
    • A single poly EEPROM cell structure for use in standard CMOS processes
    • K. Ohsaki, N. Asamoto, and S. Takagaki, "A single poly EEPROM cell structure for use in standard CMOS processes," IEEE Journal of Solid-State Circuits, vol. 29, no. 3, pp. 311-316, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , Issue.3 , pp. 311-316
    • Ohsaki, K.1    Asamoto, N.2    Takagaki, S.3
  • 5
    • 54249118321 scopus 로고    scopus 로고
    • Reliability study of single-poly floating gates in 0.13μm CMOS for use in field programmable analog arrays
    • Knoxville, TN, USA, Aug
    • F. Henrici, C. Peters, J. Becker, M. Ortmanns, and Y. Manoli, "Reliability study of single-poly floating gates in 0.13μm CMOS for use in field programmable analog arrays," in Proc. IEEE MWSCAS, Knoxville, TN, USA, Aug. 2008, pp. 17-20.
    • (2008) Proc. IEEE MWSCAS , pp. 17-20
    • Henrici, F.1    Peters, C.2    Becker, J.3    Ortmanns, M.4    Manoli, Y.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.