A 60pJ, 3-clock rising time, VTH loss compensated word-line booster circuit for 0.5V power supply embedded/discrete DRAMs

2009 IEEE International Memory Workshop, IMW '09

Volumn , Issue , 2009, Pages

  Tanakamaru, Shuhei ^a   Takeuchi, Ken ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

Charge pump; DRAM; Word line booster

Indexed keywords

CHARGE-PUMP; DRAM; HIGH-SPEED; LOW POWER; POWER CONSUMPTION; POWER SUPPLY; RISING TIME; WORD-LINE BOOSTER;

DYNAMIC RANDOM ACCESS STORAGE; ELECTRIC POWER UTILIZATION;

PUMPS;

EID: 70349993360     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IMW.2009.5090572     Document Type: Conference Paper

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