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Volumn , Issue , 2009, Pages 1502-1505

The over-bump applied resin wafer-level underfill process: Process, material and reliability

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL STEPS; FLIP-CHIP PACKAGES; HIGH TEMPERATURE STORAGE; SHAPE AND SIZE; TEST VEHICLE; UNDERFILL PROCESS; UNDERFILLS; WAFER LEVEL;

EID: 70349677330     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2009.5074211     Document Type: Conference Paper
Times cited : (37)

References (13)
  • 1
    • 0032156984 scopus 로고    scopus 로고
    • High performance no flow underfills for low-cost flip-chip application: Materials characterization
    • Wong, C. P., Shi, S., Jefferson, G. "High Performance No Flow Underfills for Low-cost Flip-chip Application: Materials Characterization," IEEE Trans of CPMT, Part A, Vol. 21, No. 3, (1998), pp. 450-458.
    • (1998) IEEE Trans of CPMT , vol.21 , Issue.3 PART A , pp. 450-458
    • Wong, C.P.1    Shi, S.2    Jefferson, G.3
  • 4
    • 0032659969 scopus 로고    scopus 로고
    • Development of the wafer-level compressive flow underfill process and its required materials
    • San Diego, CA, May
    • Shi, S. T., Yamashita, T., Wong, C. P., "Development of the Wafer-level Compressive Flow Underfill Process and its Required Materials," Proc. 49th Electronic Components and Technology Conf., San Diego, CA, May, 1999, pp. 961-966.
    • (1999) Proc. 49th Electronic Components and Technology Conf. , pp. 961-966
    • Shi, S.T.1    Yamashita, T.2    Wong, C.P.3
  • 9
    • 70349654343 scopus 로고    scopus 로고
    • Henkel Corporation, Irvine CA 92618
    • Henkel Corporation, Irvine CA 92618.
  • 10
    • 70349669827 scopus 로고    scopus 로고
    • Flip-Cchip underfill: Materials, processes and reliability
    • Lu, D. and Wong. C. P., Springer New York
    • Zhang, Z. and Wong, C. P. "Flip-Chip Underfill: Materials, Processes and Reliability," in Lu, D. and Wong. C. P., Materials for Advanced Packaging, Springer (New York, 2008), pp.. 322.
    • (2008) Materials for Advanced Packaging , pp. 322
    • Zhang, Z.1    Wong, C.P.2
  • 13
    • 33845710415 scopus 로고    scopus 로고
    • Finding solutions to the challenges in package interconnect reliability
    • Garner, L., Sane, S., Suh, D. et al., "Finding Solutions to the Challenges in Package Interconnect Reliability," Intel Tech. J., Vol.9, No.4 (2005), pp. 297-308.
    • (2005) Intel Tech. J. , vol.9 , Issue.4 , pp. 297-308
    • Garner, L.1    Sane, S.2    Suh, D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.