A 90nm CMOS low-power 60GHz transceiver with integrated baseband circuitry

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2009, Pages 314-316

  Marcu, Cristian ^a   Chowdhury, Debopriyo ^a   Thakkar, Chintan ^a   Kong, Ling Kai ^a   Tabesh, Maryam ^a   Park, Jung Dong ^a   Wang, Yanjie ^a   Afshar, Bagher ^a   Gupta, Abhinav ^a   Arbabian, Amin ^a   Gambini, Simone ^a   Zamani, Reza ^a   Niknejad, Ali M ^a   Alon, Elad ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 70349283730     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2009.4977434     Document Type: Conference Paper

References (8)

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2. B. Afshar, Y. Wang, A. M. Niknejad, "A Robust 24mW 60GHz Receiver in 90nm Standard CMOS, " ISSCC Dig. Tech. Papers, pp. 182-183, Feb 2008.
3. H. Wang, A. Hajimiri, "A Wideband CMOS Linear Digital Phase Rotator, " IEEE Custom Integrated Circuits Conf., pp. 671-674, Sept. 2007.
4. nd-Order Data-Filtered CDR, " ISSCC Dig. Tech. Papers, pp. 228-599, Feb 2007.
5. K.K. Parhi, "High-Speed Architectures for Algorithms with Quantizer Loops, " EEE International Symp. Circuits and Systems, vol.3, pp. 2357-2360, May 1990.
6. J. Kim et. al., "A 20GHz Phase-Locked Loop for 40Gb/s Serializing Transmitter in 0.13μm CMOS, " in IEEE Symp. VLSI Circuits, pp. 144-147, June 2005.
7. E. Laskin et al, "A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS, " ISSCC Dig. Tech. Papers, pp. 180-181, Feb 2008.
8. T. Mitomo et al, "A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer, " IEEE J. Solid-State Circuits, vol.43, no.4, pp. 1030-1037, April 2008.