Impact of the memory hierarchy on shared memory architectures in multicore programming models

Proceedings of the 17th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2009

Volumn , Issue , 2009, Pages 437-445

  Badia, Rosa M ^a   Perez, Josep M ^a   Ayguadé, Eduard ^a   Labarta, Jesus ^a  

^a BARCELONA SUPERCOMPUTING CENTER   (Spain)

Author keywords

Locality exploitation; Programming models for multicore; SMP Superscalar; Task scheduling

Indexed keywords

DATA DEPENDENCIES; HARDWARE COUNTERS; LOCALITY EXPLOITATION; MEMORY HIERARCHY; MULTI CORE; MULTICORE ARCHITECTURES; PROGRAMMING MODELS; PROGRAMMING MODELS FOR MULTICORE; SHARED MEMORY ARCHITECTURE; SMP SUPERSCALAR; TASK LEVELS; TASK SCHEDULING; TASK-BASED;

COMPUTER SOFTWARE SELECTION AND EVALUATION; MULTITASKING; SCHEDULING; SCHEDULING ALGORITHMS; SHAPE MEMORY EFFECT; SOFTWARE ARCHITECTURE;

PARALLEL PROGRAMMING;

EID: 70349162466     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PDP.2009.56     Document Type: Conference Paper

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