Planar inductors with subdivided conductors for reducing eddy current effects

2003 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems - Digest of Papers

Volumn , Issue , 2003, Pages 104-106

  Peter, M ^a   Hein, H ^a   Oehler, F ^a   Baureis, P ^b  

^a FRAUNHOFER INSTITUTE FOR INTEGRATED CIRCUITS IIS   (Germany)

^b University of Applied Science   (Germany)

Author keywords

CMOS process; Conductors; Eddy currents; Inductors; Magnetic fields; Measurement standards; Q factor; Scattering parameters; Silicon; Spirals

Indexed keywords

BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; EDDY CURRENTS; ELECTRIC CONDUCTORS; ELECTRIC INDUCTORS; INTEGRATED CIRCUITS; MAGNETIC FIELDS; Q FACTOR MEASUREMENT; SCATTERING PARAMETERS; SILICON;

CMOS PROCESSS; EDDY-CURRENT EFFECTS; MEASUREMENT STANDARDS; METAL LAYER; PLANAR INDUCTOR; Q-FACTORS; QUALITY FACTORS; SPIRALS;

MONOLITHIC INTEGRATED CIRCUITS;

EID: 69749116436     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SMIC.2003.1196680     Document Type: Conference Paper

References (6)

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2. M. Peter, H. Hein, F. Oehler, P. Baureis, "New transmission line structure with suppressed eddy current effects", IEEE, MTT-S 2002
3. C.P. Yue, S.S. Wong, "On-Chip Spiral Inductors with Patterned Ground Shields for Si-Based RF IC's", IEEE J. Solid-State Circuits, vol. 33, pp. 743-752, May 1998
4. J.R. Long, M.A. Copeland, "The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's", IEEE J. Solid-State Circuits, vol. 32, pp. 357-369, Mar. 1997
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6. J.M. Lopez-Villegas, J. Samitier, C. Cane, P. Losantos, "Improvement of the Quality Factor of RF Integrated inductors by Layout Optimization", IEEE RFIC Symp. Dig. 1998, pp. 169-172