An improved scaled DCT architecture

IEEE Transactions on Consumer Electronics

Volumn 55, Issue 2, 2009, Pages 685-689

  Wu, Zhigang ^a   Sha, Jin ^a   Wang, Zhongfeng ^b   Li, Li ^a   Gao, Minglun ^a  

^a NANJING UNIVERSITY   (China)

^b Oregon State University   (United States)

Author keywords

CORDIC algorithm; DCT; Scaled DCT

Indexed keywords

APPROXIMATION METHODS; CO-ORDINATE ROTATION DIGITAL COMPUTERS; CORDIC ALGORITHM; DCT; EFFICIENT ARCHITECTURE; LAST STAGE; LOEFFLER DCT; PATH DELAY; SCALED DCT;

APPROXIMATION ALGORITHMS; APPROXIMATION THEORY; ARCHITECTURAL DESIGN; DIGITAL COMPUTERS; DISCRETE COSINE TRANSFORMS; MULTICARRIER MODULATION; SIGNAL FILTERING AND PREDICTION;

COSINE TRANSFORMS;

EID: 68949185000     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCE.2009.5174440     Document Type: Article

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