Synergistic execution of stream programs on multicores with accelerators

ACM SIGPLAN Notices

Volumn 44, Issue 7, 2009, Pages 99-108

  Udupa, Abhishek ^a   Govindarajan, R ^a   Thazhuthaveetil, Matthew J ^a  

^a INDIAN INSTITUTE OF SCIENCE   (India)

Author keywords

CUDA; GPU programming; Partitioning; Software pipelining; Stream programming

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS; COMPUTER HARDWARE; DATA TRANSFER; GERMANIUM COMPOUNDS; GRAPHICS PROCESSING UNIT; HEURISTIC ALGORITHMS; INTEGER PROGRAMMING; LINEAR TRANSFORMATIONS; MATHEMATICAL TRANSFORMATIONS; MULTICORE PROGRAMMING; PIPELINES; PROGRAM PROCESSORS;

CUDA; GPU PROGRAMMING; PARTITIONING; SOFTWARE PIPELINING; STREAM PROGRAMMING;

PIPELINE PROCESSING SYSTEMS;

EID: 67650812067     PISSN: 15232867     EISSN: None     Source Type: Journal    
DOI: 10.1145/1543136.1542466     Document Type: Conference Paper

References (29)

1. NVIDIA CUDA Programming Guide. URL http://www.nvidia. com/cuda.
2. OpenCL Overview. URL http://www.khronos.org/ developers/library/overview/ opencl-overview.pdf.
3. StreamIt Home Page. URL http://www.cag.lcs.mit.edu/ streamit/.
4. S. S. Bhattacharyya and E. A. Lee. Looped Schedules for Dataflow Descriptions of Multirate Signal Processing Algorithms. Formal Methods in System Design, 5(3), 1994.
5. Ian Buck et. al. Brook for GPUs: Stream Computing on Graphics Hardware. ACM Trans. on Graphics, 23(3), 2004.
6. J. A. Kahle et. al. Introduction to the Cell Multiprocessor. IBM Journal of Research and Development, 49(4-5), 2005.
7. Michael Bedford Taylor et. al. The RAW Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. IEEE Micro, 22(2), 2002.
8. Michael I. Gordon et. al. A Stream Compiler for Communication-Exposed Architectures. In ASPLOS-X: Proc. of the 10th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 2002.
9. Shane Ryoo et. al. Program Optimization Space Pruning for a Multithreaded GPU. In CGO '08: Proc. of the sixth annual IEEE/ACM Intl. Symp. on Code Generation and Optimization, 2008.
10. Shane Ryoo et. al. Optimization Principles and Application Performance Evaluation of a Multithreaded GPU using CUDA. In PPoPP '08: Proc. of the 13th ACM SIGPLAN Symp. on Principles and Practice of Parallel Programming, 2008.
11. G. R. Gao, R. Govindarajan, and P. Panangaden. Well-Behaved Dataflow Programs for DSP Computation. ICASSP-92: IEEE Intl. Conf. on Acoustics, Speech, and Signal Processing, 1992., 5, Mar 1992.
12. Michael I Gordon, William Thies, and Saman Amarasinghe. Exploiting Coarse-grained Task, Data, and Pipeline Parallelism in Stream Programs. In ASPLOS-XII: Proc. of the 12th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 2006.
13. R. Govindarajan and Guang R. Gao. A Novel Framework for Multi-rate Scheduling in DSP Applications. In ASAP '93: Proc. of the 1993 Intl. Conf. on Application-Specific Array Processors, Oct 1993.
14. R. Govindarajan, Guang R. Gao, and Palash Desai. Minimizing Memory Requirements in Rate-optimal Schedules. In ASAP '94: Proc. of the 1994 Intl. Conf. on Application Specific Array Processors, Aug 1994.
15. Junwei Hou and Wayne Wolf. Process Partitioning for Distributed Embedded Systems. In CODES '96: Proc. of the 4th Intl. Workshop on Hardware/Software Co-Design, 1996.
16. G. Karypis and V. Kumar. Multilevel k-way Partitioning Scheme for Irregular Graphs. Journal of Parallel and Distributed Computing, 48, 1998.
17. B.W. Kernighan and S. Lin. An Efficient Heuristic Procedure for Partitioning Graphs. Bell System Tech. Journal, 49, Feb. 1970.
18. Manjunath Kudlur and Scott Mahlke. Orchestrating the Execution of Stream Programs on Multicore Platforms. In PLDI '08: Proc. of the 2008 ACM SIGPLAN Conf. on Programming Language Design and Implementation, 2008.
19. E. A. Lee and D. G. Messerschmitt. Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing. IEEE Trans. on Computers, 36(1), 1987.
20. E.A. Lee and D.G. Messerschmitt. Synchronous Data Flow. Proc. of the IEEE, 75(9), Sept. 1987.
21. B. R. Rau. Iterative Modulo Scheduling: An Algorithm for Software Pipelining Loops. In MICRO 27: Proc. of the 27th annual Intl. Symp. on Microarchitecture, 1994.
22. B. R. Rau, Michael S. Schlansker, and P. P. Tirumalai. Code Generation Schema for Modulo Scheduled Loops. In MICRO 25: Proc. of the 25th annual Intl. Symp. on Microarchitecture, 1992.
23. John Ruttenberg, Guang R. Gao, A. Stoutchinin, and W. Lichtenstein. Software Pipelining Showdown: Optimal vs. Heuristic Methods in a Production Compiler. In PLDI '96: Proc. of the ACM SIGPLAN 1996 Conf. on Programming Language Design and Implementation, 1996.
24. Janis Sermulins, William Thies, Rodric Rabbah, and Saman Amaras-inghe. Cache Aware Optimization of Stream Programs. In LCTES '05: Proc. of the 2005 ACM SIGPLAN/SIGBED Conf. on Languages, Compilers, and Tools for Embedded Systems, 2005.
25. David Tarditi, Sidd Puri, and Jose Oglesby. Accelerator: Using Data Parallelism to Program GPUs for General-Purpose Uses. In ASPLOS-XII: Proc. of the 12th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems, 2006.
26. William Thies, Michal Karczmarek, and Saman Amarasinghe. StreamIt: A Language for Streaming Applications. In CC '02: Proc. of the 11th Intl. Conf. on Compiler Construction, 2002.
27. Abhishek Udupa, R. Govindarajan, and Matthew J. Thazhuthaveetil. Software Pipelined Execution of Stream Programs on GPUs. In CGO '09: Proc. of the seventh annual IEEE/ACM Intl. Symp. on Code Generation and Optimization, 2009.
28. Ti-Yen Yen and Wayne Wolf. Communication Synthesis for Distributed Embedded Systems. In ICCAD '95: Proc. of the 1995 IEEE/ACM Intl. Conf. on Computer-aided Design, 1995.
29. D. Zhang, Qiuyuan J. Li, Rodric Rabbah, and Saman Amarasinghe. A Lightweight Streaming Layer for Multicore Execution. SIGARCH Computer Architecture News, 36(2), 2008.