A 6-bit pipelined analog-to-digital converter with current-switching open-loop residue amplification

Proceedings of 2008 IEEE Asian Solid-State Circuits Conference, A-SSCC 2008

Volumn , Issue , 2008, Pages 61-64

  Hsieh, Fen Chiu ^a   Lee, Tai Cheng ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE AREA; CMOS TECHNOLOGY; CONTROL TECHNIQUES; DIGITAL CALIBRATIONS; GAIN ERRORS; GATE SWITCHING; OPEN LOOPS; PIPELINED ADC; PIPELINED ANALOG-TO-DIGITAL CONVERTER; POWER SUPPLY; SWITCHING TECHNIQUES;

AMPLIFICATION; CMOS INTEGRATED CIRCUITS; GAIN CONTROL; MULTICARRIER MODULATION;

SWITCHING;

EID: 67649992723     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2008.4708729     Document Type: Conference Paper

References (3)

1. B. Murmann and B. E. Boser, "A 12-b 75-MS/s Pipelined ADC Using Open-Loop Residue Amplification," in IEEE J. Solid-State Circuits, vol. 38, pp. 2040-2050, Dec. 2003.
2. B. Razavi, "Principles of Data Conversion System Design," in Wiley-IEEE Press, 1995.
3. D. L. Shen and T. C. Lee, "A 6-b 800-MS/s Pipelined A/D Converter with Open-Loop Amplifiers," in IEEE J. Solid-State Circuits, vol. 42, pp. 258-268, Feb. 2007.